Enabling Technology

BSA-CIM
Orbital Compute

Bit-Shift Accumulate · Compute-in-Memory.
One processor architecture. Nine concurrent missions.

104 TOPS sustained INT8
25 W power draw
~50× more inference per orbital watt vs GPU
OTA mission reconfiguration

All figures modeled or assumed unless noted. See spec table below.

What is BSA-CIM?

BSA

Bit-Shift Accumulate

Neural-network weights are encoded in Canonical Signed-Digit (CSD) representation — a sum of signed powers of two. Every term is a single binary decision: present, present-negated, or absent. This replaces costly multiply-accumulate (MAC) operations with integer bit-shifts.

CIM

Compute-in-Memory

Instead of moving weights from memory to a separate compute die (the "memory wall"), computation happens where the data lives — inside the RRAM array. Because BSA terms are binary, RRAM cells only need two states (not 8–16 analog levels), which matches foundry-qualified embedded NVM processes.

The load-bearing advantage

Conventional Compute-in-Memory research has stalled for a decade because multi-level-cell analog storage requires precise conductance states that drift over time. BSA solves this by needing only binary states — matching the reliability bar foundries already meet, not the analog precision bar no one has cleared at volume.

Slice-skipping (the energy mechanism)

CSD terms are structurally sparse — most bit-plane positions are zero. The BSA-CIM array skips computation on zero-valued bit planes entirely. Fewer active cells per computation = fewer ADC conversions = less energy. This is what drives the 0.239 pJ/MAC array-level figure vs. 0.716 pJ/MAC for dense bit-serial — a ~3× array-level win.

Performance Specification Modeled · GF 22FDX + binary RRAM
Sustained TOPS (INT8)
104 TOPS Modeled
Power Draw
25 W Assumed
Array-level energy
0.239 pJ/MAC Modeled vs 0.716 baseline
Inference per orbital watt
~50× vs GPU Modeled
Packaged die cost
~$22 /die Modeled
RRAM retention
≥10 years Literature

IP

Sibacus '522 patent (IPOS provisional, filed May 19 2026) — establishes bit-shift operation as simplified multiplication. PCT conversion planned before Month 12.

Software Defined Compute

BSA is not merely an energy optimisation — it is the foundation of a radical architectural shift. One hardware fabric. Every computational domain. No specialised silicon required.

The core insight

The BSA hardware is radically simplified and domain-agnostic. All domain-specific behaviour resides in the coefficient tables loaded into the same physical hardware. No hardware modification is required between domains — only the coefficient tables change.

Before BSA — Hardware Defined

GPU tensor cores → AI inference DSP slices → signal processing Baseband ASIC → wireless Radar ASIC → matched filter MCU FPU → control loops

6+ specialised silicon dies. Years of hardware design per domain.

After BSA — Software Defined

One BSA fabric Barrel shifters + adders + SRAM One coefficient format One verification effort Runtime precision control

Domain switching = loading a new coefficient table. New algorithms require new firmware, not new silicon.

Domains served — one hardware fabric

Neural network inference

Transformer LLM forward pass, attention, feed-forward

Diffusion model generation

U-Net and DiT denoising architectures

MIMO beamforming / 5G baseband

OFDM demodulation, channel estimation, DFT

Radar matched filtering

Chirp reference coefficient loading

FIR/IIR signal processing

Filter tap coefficient loading

PID / Kalman control

State transition and gain coefficient loading

Scientific & financial compute

Conductance matrix, pricing model coefficients

Triple-duty die

The most commercially significant SDC embodiment: a single Sibacus die simultaneously serves AI inference, diffusion model generation, and 5G baseband — replacing both a GPU and a baseband processor in a single chip.

What this means for EquaSat

A single BSA-CIM satellite carries one unified hardware fabric. Loading a sovereign AI model coefficient table makes it an inference node. Loading SAR signal-processing coefficients makes it an Earth observation processor. Loading navigation and control coefficients makes it an autonomous orbital vehicle. Nine missions. One chip. Domain switching via software update — no new hardware, no new launches.

Why Orbit Changes Everything

BSA-CIM's dormant-weight property — zero standby power — is exceptionally decisive in orbit, where every watt costs mass and mass costs money. Here is how BSA-CIM compares to GPU-class compute across six orbital physics barriers.

Thermal rejection

GPU-class

180 m² deployable radiators for a 150 kW bus

BSA-CIM

12–24 m² for a 15–20 kW bus

Eclipse survival

GPU-class

HBM volatile — loses all weights on power loss (5,800 eclipses/year at 550 km)

BSA-CIM

RRAM non-volatile — retains weights unpowered, resumes instantly after eclipse

Radiation tolerance

GPU-class

3–5nm nodes: high single-event upset rate, latch-up vulnerable

BSA-CIM

22nm FD-SOI: SEL-immune by process, reduced SEU cross-section

Standby power

GPU-class

Dense register files and HBM power even when idle

BSA-CIM

Dormant weights draw zero power — only active cells consume energy

Downlink bandwidth

GPU-class

Large raw activations require wide downlinks

BSA-CIM

60K tok/s ≈ only ~240 KB/s — a single modest X-band link suffices

Upgrade path

GPU-class

~3-year effective life; hardware must be replaced

BSA-CIM

OTA weight refresh weekly — serves 2034 models on 2029 hardware

Equatorial LEO solar bonus

Solar panels in LEO are ~40% more productive per panel than on the ground. Equatorial orbit provides the highest solar flux of any orbital regime — 12+ kW continuous, zero fuel cost per watt. BSA-CIM's dormant weights mean standby power is near zero, stretching every watt directly into active inference.

Three-Layer Workload Architecture

The orbital compute platform runs three independent workload layers simultaneously. The key design principle: keep the satellite link thin by keeping intelligence at the edges.

Layer 1

General Sovereign Core

National scale

7B–70B national model(s). Frontier-grade general inference for all populations served. An "edge translation sandwich" keeps the link thin — dialect translation happens on-device, the satellite sends and receives text only.

Layer 2

Specialist Portfolio

Sector scale

Independent fine-tuned models in dedicated silicon tiles — dormant at zero power until routed to. Includes agriculture (rice/corn/coconut agronomy), fisheries/maritime, health triage, and disaster-response protocols. Each is independently updatable and independently ownable by a ministry.

Layer 3

Dialect Layer

Personal scale

Lives on edge devices, not the satellite. S-Neo/traFIX resident models strip all traffic to text before it touches the satellite link — keeping downlink requirements at ~240 KB/s regardless of how many users are served.

S-Orbit Constellation

Three-tier scaling ladder from demonstration to planetary-scale sovereign compute.

01
Phase 0 Technology Demo

BSA-CIM ASIC off GF 22FDX MPW · ground validation · ITU spectrum filing · flight qualification

Target Q4 2026
CapEx $2–4M
02
Phase 1 First Launch

12U CubeSat demo + 16 × Tier-3 smallsats · SE Asia corridor · ~3B people

Target 2027
CapEx ~$650M
03
Phase 2 Africa + Americas

+16 satellites · 4 planes · West/East Africa, LatAm (~1.5B more)

Target 2028
CapEx ~$1.3B cumulative
04
Phase 3 Full ±30° Band

48 satellites · Walker 30:48/6/1 · 5.5–6.0B people · SCC fully operational

Target 2029
CapEx $2.0–2.1B cumulative
48 satellites
Walker 30:48/6/1
550 km equatorial LEO
altitude
5.5–6.0B people served
~75% of humanity
$2.0B constellation CapEx
(Phase 2)

Per-nation share (15 SCC members): $137–140M — less than most single-datacenter budgets. Annual OpEx per nation: $23–25M.

Nine Missions.
One Platform.

The BSA-CIM platform is the reason EquaSat can run sovereign AI inference, deforestation monitoring, maritime surveillance, broadband, and carbon verification simultaneously — from a single satellite in equatorial orbit.